1. Field of the Invention
This invention relates to the art of manufacturing and, more particularly, to a method of establishing a lot grade system for lots in semiconductor device manufacturing process.
2. Description of Background
Semiconductor wafer fabrication includes a series of carefully designed process steps running on sophisticated capital equipment. The demand for more product functionality drives a need for more complicated production line processes. As production processes grow more complex, the need to monitor production quality increases. Work-in-process or WIP management employs a lot grading system to monitor lots of semiconductor wafers passing through a production process to ensure high yield and high quality. Lot grading is a method of monitoring process changes in a sequential order to evaluate potentially incrementally higher yield output. Conventionally, for each major process change, a new lot grade(s) would be updated manually. Defining a new lot grade may involve single, multiple, front-end-of-the-line FEOL or back-end-of-the-line BEOL process changes. In conventional lot grading methods, defining a new lot grade for a BEOL process change, of which a WIP may contain multiple lot grades, usually did not accommodate FEOL upgrading, or vice-versa. Given the large number of lots, often times greater than 100, in a semiconductor production line at any given time, manual lot grading is very time-consuming and often times unreliable for quality and yield tracking purposes.